\doxysubsubsection{UART Exported Types }
\hypertarget{group___u_a_r_t___exported___types}{}\label{group___u_a_r_t___exported___types}\index{UART Exported Types@{UART Exported Types}}
\doxysubsubsubsubsection*{Classes}
\begin{DoxyCompactItemize}
\item 
struct \mbox{\hyperlink{struct_u_a_r_t___init_type_def}{UART\+\_\+\+Init\+Type\+Def}}
\begin{DoxyCompactList}\small\item\em UART Init Structure definition. \end{DoxyCompactList}\item 
struct \mbox{\hyperlink{struct_u_a_r_t___adv_feature_init_type_def}{UART\+\_\+\+Adv\+Feature\+Init\+Type\+Def}}
\begin{DoxyCompactList}\small\item\em UART Advanced Features initialization structure definition. \end{DoxyCompactList}\item 
struct \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def}{\+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def}}
\begin{DoxyCompactList}\small\item\em UART handle Structure definition. \end{DoxyCompactList}\end{DoxyCompactItemize}
\doxysubsubsubsubsection*{Typedefs}
\begin{DoxyCompactItemize}
\item 
typedef uint32\+\_\+t \mbox{\hyperlink{group___u_a_r_t___exported___types_ga94c58ae1f4dbcf6032224edfc93a6e19}{HAL\+\_\+\+UART\+\_\+\+State\+Type\+Def}}
\begin{DoxyCompactList}\small\item\em HAL UART State definition. \end{DoxyCompactList}\item 
typedef uint32\+\_\+t \mbox{\hyperlink{group___u_a_r_t___exported___types_ga9f272475ea543a68fd8cb19f03a9bce9}{HAL\+\_\+\+UART\+\_\+\+Rx\+Type\+Type\+Def}}
\begin{DoxyCompactList}\small\item\em HAL UART Reception type definition. \end{DoxyCompactList}\item 
typedef uint32\+\_\+t \mbox{\hyperlink{group___u_a_r_t___exported___types_gadddf3d5480235c945dc8eec58f961203}{HAL\+\_\+\+UART\+\_\+\+Rx\+Event\+Type\+Type\+Def}}
\begin{DoxyCompactList}\small\item\em HAL UART Rx Event type definition. \end{DoxyCompactList}\item 
\Hypertarget{group___u_a_r_t___exported___types_ga5de4a49eb132735325e706f406c69d6e}\label{group___u_a_r_t___exported___types_ga5de4a49eb132735325e706f406c69d6e} 
typedef struct \mbox{\hyperlink{struct_____u_a_r_t___handle_type_def}{\+\_\+\+\_\+\+UART\+\_\+\+Handle\+Type\+Def}} {\bfseries UART\+\_\+\+Handle\+Type\+Def}
\begin{DoxyCompactList}\small\item\em UART handle Structure definition. \end{DoxyCompactList}\end{DoxyCompactItemize}
\doxysubsubsubsubsection*{Enumerations}
\begin{DoxyCompactItemize}
\item 
enum \mbox{\hyperlink{group___u_a_r_t___exported___types_gad957348fe227e5cb75b70be026c5ae81}{UART\+\_\+\+Clock\+Source\+Type\+Def}} \{ \newline
\mbox{\hyperlink{group___u_a_r_t___exported___types_ggad957348fe227e5cb75b70be026c5ae81ad6525101a217833e23f5ca621d9f4a6f}{UART\+\_\+\+CLOCKSOURCE\+\_\+\+D2\+PCLK1}} = 0x00U
, \mbox{\hyperlink{group___u_a_r_t___exported___types_ggad957348fe227e5cb75b70be026c5ae81a2331021d51e66dd84c836c660e18e832}{UART\+\_\+\+CLOCKSOURCE\+\_\+\+D2\+PCLK2}} = 0x01U
, \mbox{\hyperlink{group___u_a_r_t___exported___types_ggad957348fe227e5cb75b70be026c5ae81a77165931619ab93f8024949aafd3902a}{UART\+\_\+\+CLOCKSOURCE\+\_\+\+D3\+PCLK1}} = 0x02U
, \mbox{\hyperlink{group___u_a_r_t___exported___types_ggad957348fe227e5cb75b70be026c5ae81a350b9dd6358f8658ad02bbc6f74f8ea3}{UART\+\_\+\+CLOCKSOURCE\+\_\+\+PLL2}} = 0x04U
, \newline
\mbox{\hyperlink{group___u_a_r_t___exported___types_ggad957348fe227e5cb75b70be026c5ae81a2305ac9ef420776f63058374de4292ff}{UART\+\_\+\+CLOCKSOURCE\+\_\+\+PLL3}} = 0x08U
, \mbox{\hyperlink{group___u_a_r_t___exported___types_ggad957348fe227e5cb75b70be026c5ae81af4da147f3b62642e1ce6d2cb22aff32e}{UART\+\_\+\+CLOCKSOURCE\+\_\+\+HSI}} = 0x10U
, \mbox{\hyperlink{group___u_a_r_t___exported___types_ggad957348fe227e5cb75b70be026c5ae81a7c7f0d608c372b61954bcb11b9cdc96c}{UART\+\_\+\+CLOCKSOURCE\+\_\+\+CSI}} = 0x20U
, \mbox{\hyperlink{group___u_a_r_t___exported___types_ggad957348fe227e5cb75b70be026c5ae81ab9335bad77171144c2994f1554ce3901}{UART\+\_\+\+CLOCKSOURCE\+\_\+\+LSE}} = 0x40U
, \newline
\mbox{\hyperlink{group___u_a_r_t___exported___types_ggad957348fe227e5cb75b70be026c5ae81a9012cc24ac82c0d7aa7558f73d770eab}{UART\+\_\+\+CLOCKSOURCE\+\_\+\+UNDEFINED}} = 0x80U
 \}
\begin{DoxyCompactList}\small\item\em UART clock sources definition. \end{DoxyCompactList}\end{DoxyCompactItemize}


\doxysubsubsubsection{Detailed Description}


\label{doc-typedef-members}
\Hypertarget{group___u_a_r_t___exported___types_doc-typedef-members}
\doxysubsubsubsection{Typedef Documentation}
\Hypertarget{group___u_a_r_t___exported___types_gadddf3d5480235c945dc8eec58f961203}\index{UART Exported Types@{UART Exported Types}!HAL\_UART\_RxEventTypeTypeDef@{HAL\_UART\_RxEventTypeTypeDef}}
\index{HAL\_UART\_RxEventTypeTypeDef@{HAL\_UART\_RxEventTypeTypeDef}!UART Exported Types@{UART Exported Types}}
\doxysubsubsubsubsection{\texorpdfstring{HAL\_UART\_RxEventTypeTypeDef}{HAL\_UART\_RxEventTypeTypeDef}}
{\footnotesize\ttfamily \label{group___u_a_r_t___exported___types_gadddf3d5480235c945dc8eec58f961203} 
typedef uint32\+\_\+t \mbox{\hyperlink{group___u_a_r_t___exported___types_gadddf3d5480235c945dc8eec58f961203}{HAL\+\_\+\+UART\+\_\+\+Rx\+Event\+Type\+Type\+Def}}}



HAL UART Rx Event type definition. 

\begin{DoxyNote}{Note}
HAL UART Rx Event type value aims to identify which type of Event has occurred leading to call of the Rx\+Event callback. This parameter can be a value of \doxylink{group___u_a_r_t___rx_event___type___values}{UART Rx\+Event type values} \+: HAL\+\_\+\+UART\+\_\+\+RXEVENT\+\_\+\+TC = 0x00U, HAL\+\_\+\+UART\+\_\+\+RXEVENT\+\_\+\+HT = 0x01U, HAL\+\_\+\+UART\+\_\+\+RXEVENT\+\_\+\+IDLE = 0x02U, 
\end{DoxyNote}
\Hypertarget{group___u_a_r_t___exported___types_ga9f272475ea543a68fd8cb19f03a9bce9}\index{UART Exported Types@{UART Exported Types}!HAL\_UART\_RxTypeTypeDef@{HAL\_UART\_RxTypeTypeDef}}
\index{HAL\_UART\_RxTypeTypeDef@{HAL\_UART\_RxTypeTypeDef}!UART Exported Types@{UART Exported Types}}
\doxysubsubsubsubsection{\texorpdfstring{HAL\_UART\_RxTypeTypeDef}{HAL\_UART\_RxTypeTypeDef}}
{\footnotesize\ttfamily \label{group___u_a_r_t___exported___types_ga9f272475ea543a68fd8cb19f03a9bce9} 
typedef uint32\+\_\+t \mbox{\hyperlink{group___u_a_r_t___exported___types_ga9f272475ea543a68fd8cb19f03a9bce9}{HAL\+\_\+\+UART\+\_\+\+Rx\+Type\+Type\+Def}}}



HAL UART Reception type definition. 

\begin{DoxyNote}{Note}
HAL UART Reception type value aims to identify which type of Reception is ongoing. This parameter can be a value of \doxylink{group___u_a_r_t___reception___type___values}{UART Reception type values} \+: HAL\+\_\+\+UART\+\_\+\+RECEPTION\+\_\+\+STANDARD = 0x00U, HAL\+\_\+\+UART\+\_\+\+RECEPTION\+\_\+\+TOIDLE = 0x01U, HAL\+\_\+\+UART\+\_\+\+RECEPTION\+\_\+\+TORTO = 0x02U, HAL\+\_\+\+UART\+\_\+\+RECEPTION\+\_\+\+TOCHARMATCH = 0x03U, 
\end{DoxyNote}
\Hypertarget{group___u_a_r_t___exported___types_ga94c58ae1f4dbcf6032224edfc93a6e19}\index{UART Exported Types@{UART Exported Types}!HAL\_UART\_StateTypeDef@{HAL\_UART\_StateTypeDef}}
\index{HAL\_UART\_StateTypeDef@{HAL\_UART\_StateTypeDef}!UART Exported Types@{UART Exported Types}}
\doxysubsubsubsubsection{\texorpdfstring{HAL\_UART\_StateTypeDef}{HAL\_UART\_StateTypeDef}}
{\footnotesize\ttfamily \label{group___u_a_r_t___exported___types_ga94c58ae1f4dbcf6032224edfc93a6e19} 
typedef uint32\+\_\+t \mbox{\hyperlink{group___u_a_r_t___exported___types_ga94c58ae1f4dbcf6032224edfc93a6e19}{HAL\+\_\+\+UART\+\_\+\+State\+Type\+Def}}}



HAL UART State definition. 

\begin{DoxyNote}{Note}
HAL UART State value is a combination of 2 different substates\+: g\+State and Rx\+State (see \doxylink{group___u_a_r_t___state___definition}{UART State Code Definition}).
\begin{DoxyItemize}
\item g\+State contains UART state information related to global Handle management and also information related to Tx operations. g\+State value coding follow below described bitmap \+: b7-\/b6 Error information 00 \+: No Error 01 \+: (Not Used) 10 \+: Timeout 11 \+: Error b5 Peripheral initialization status 0 \+: Reset (Peripheral not initialized) 1 \+: Init done (Peripheral initialized. HAL UART Init function already called) b4-\/b3 (not used) xx \+: Should be set to 00 b2 Intrinsic process state 0 \+: Ready 1 \+: Busy (Peripheral busy with some configuration or internal operations) b1 (not used) x \+: Should be set to 0 b0 Tx state 0 \+: Ready (no Tx operation ongoing) 1 \+: Busy (Tx operation ongoing)
\item Rx\+State contains information related to Rx operations. Rx\+State value coding follow below described bitmap \+: b7-\/b6 (not used) xx \+: Should be set to 00 b5 Peripheral initialization status 0 \+: Reset (Peripheral not initialized) 1 \+: Init done (Peripheral initialized) b4-\/b2 (not used) xxx \+: Should be set to 000 b1 Rx state 0 \+: Ready (no Rx operation ongoing) 1 \+: Busy (Rx operation ongoing) b0 (not used) x \+: Should be set to 0. 
\end{DoxyItemize}
\end{DoxyNote}


\label{doc-enum-members}
\Hypertarget{group___u_a_r_t___exported___types_doc-enum-members}
\doxysubsubsubsection{Enumeration Type Documentation}
\Hypertarget{group___u_a_r_t___exported___types_gad957348fe227e5cb75b70be026c5ae81}\index{UART Exported Types@{UART Exported Types}!UART\_ClockSourceTypeDef@{UART\_ClockSourceTypeDef}}
\index{UART\_ClockSourceTypeDef@{UART\_ClockSourceTypeDef}!UART Exported Types@{UART Exported Types}}
\doxysubsubsubsubsection{\texorpdfstring{UART\_ClockSourceTypeDef}{UART\_ClockSourceTypeDef}}
{\footnotesize\ttfamily \label{group___u_a_r_t___exported___types_gad957348fe227e5cb75b70be026c5ae81} 
enum \mbox{\hyperlink{group___u_a_r_t___exported___types_gad957348fe227e5cb75b70be026c5ae81}{UART\+\_\+\+Clock\+Source\+Type\+Def}}}



UART clock sources definition. 

\begin{DoxyEnumFields}[2]{Enumerator}
\raisebox{\heightof{T}}[0pt][0pt]{\index{UART\_CLOCKSOURCE\_D2PCLK1@{UART\_CLOCKSOURCE\_D2PCLK1}!UART Exported Types@{UART Exported Types}}\index{UART Exported Types@{UART Exported Types}!UART\_CLOCKSOURCE\_D2PCLK1@{UART\_CLOCKSOURCE\_D2PCLK1}}}\Hypertarget{group___u_a_r_t___exported___types_ggad957348fe227e5cb75b70be026c5ae81ad6525101a217833e23f5ca621d9f4a6f}\label{group___u_a_r_t___exported___types_ggad957348fe227e5cb75b70be026c5ae81ad6525101a217833e23f5ca621d9f4a6f} 
UART\+\_\+\+CLOCKSOURCE\+\_\+\+D2\+PCLK1&Domain2 PCLK1 clock source \\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{UART\_CLOCKSOURCE\_D2PCLK2@{UART\_CLOCKSOURCE\_D2PCLK2}!UART Exported Types@{UART Exported Types}}\index{UART Exported Types@{UART Exported Types}!UART\_CLOCKSOURCE\_D2PCLK2@{UART\_CLOCKSOURCE\_D2PCLK2}}}\Hypertarget{group___u_a_r_t___exported___types_ggad957348fe227e5cb75b70be026c5ae81a2331021d51e66dd84c836c660e18e832}\label{group___u_a_r_t___exported___types_ggad957348fe227e5cb75b70be026c5ae81a2331021d51e66dd84c836c660e18e832} 
UART\+\_\+\+CLOCKSOURCE\+\_\+\+D2\+PCLK2&Domain2 PCLK2 clock source \\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{UART\_CLOCKSOURCE\_D3PCLK1@{UART\_CLOCKSOURCE\_D3PCLK1}!UART Exported Types@{UART Exported Types}}\index{UART Exported Types@{UART Exported Types}!UART\_CLOCKSOURCE\_D3PCLK1@{UART\_CLOCKSOURCE\_D3PCLK1}}}\Hypertarget{group___u_a_r_t___exported___types_ggad957348fe227e5cb75b70be026c5ae81a77165931619ab93f8024949aafd3902a}\label{group___u_a_r_t___exported___types_ggad957348fe227e5cb75b70be026c5ae81a77165931619ab93f8024949aafd3902a} 
UART\+\_\+\+CLOCKSOURCE\+\_\+\+D3\+PCLK1&Domain3 PCLK1 clock source \\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{UART\_CLOCKSOURCE\_PLL2@{UART\_CLOCKSOURCE\_PLL2}!UART Exported Types@{UART Exported Types}}\index{UART Exported Types@{UART Exported Types}!UART\_CLOCKSOURCE\_PLL2@{UART\_CLOCKSOURCE\_PLL2}}}\Hypertarget{group___u_a_r_t___exported___types_ggad957348fe227e5cb75b70be026c5ae81a350b9dd6358f8658ad02bbc6f74f8ea3}\label{group___u_a_r_t___exported___types_ggad957348fe227e5cb75b70be026c5ae81a350b9dd6358f8658ad02bbc6f74f8ea3} 
UART\+\_\+\+CLOCKSOURCE\+\_\+\+PLL2&PLL2Q clock source \\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{UART\_CLOCKSOURCE\_PLL3@{UART\_CLOCKSOURCE\_PLL3}!UART Exported Types@{UART Exported Types}}\index{UART Exported Types@{UART Exported Types}!UART\_CLOCKSOURCE\_PLL3@{UART\_CLOCKSOURCE\_PLL3}}}\Hypertarget{group___u_a_r_t___exported___types_ggad957348fe227e5cb75b70be026c5ae81a2305ac9ef420776f63058374de4292ff}\label{group___u_a_r_t___exported___types_ggad957348fe227e5cb75b70be026c5ae81a2305ac9ef420776f63058374de4292ff} 
UART\+\_\+\+CLOCKSOURCE\+\_\+\+PLL3&PLL3Q clock source \\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{UART\_CLOCKSOURCE\_HSI@{UART\_CLOCKSOURCE\_HSI}!UART Exported Types@{UART Exported Types}}\index{UART Exported Types@{UART Exported Types}!UART\_CLOCKSOURCE\_HSI@{UART\_CLOCKSOURCE\_HSI}}}\Hypertarget{group___u_a_r_t___exported___types_ggad957348fe227e5cb75b70be026c5ae81af4da147f3b62642e1ce6d2cb22aff32e}\label{group___u_a_r_t___exported___types_ggad957348fe227e5cb75b70be026c5ae81af4da147f3b62642e1ce6d2cb22aff32e} 
UART\+\_\+\+CLOCKSOURCE\+\_\+\+HSI&HSI clock source \\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{UART\_CLOCKSOURCE\_CSI@{UART\_CLOCKSOURCE\_CSI}!UART Exported Types@{UART Exported Types}}\index{UART Exported Types@{UART Exported Types}!UART\_CLOCKSOURCE\_CSI@{UART\_CLOCKSOURCE\_CSI}}}\Hypertarget{group___u_a_r_t___exported___types_ggad957348fe227e5cb75b70be026c5ae81a7c7f0d608c372b61954bcb11b9cdc96c}\label{group___u_a_r_t___exported___types_ggad957348fe227e5cb75b70be026c5ae81a7c7f0d608c372b61954bcb11b9cdc96c} 
UART\+\_\+\+CLOCKSOURCE\+\_\+\+CSI&CSI clock source \\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{UART\_CLOCKSOURCE\_LSE@{UART\_CLOCKSOURCE\_LSE}!UART Exported Types@{UART Exported Types}}\index{UART Exported Types@{UART Exported Types}!UART\_CLOCKSOURCE\_LSE@{UART\_CLOCKSOURCE\_LSE}}}\Hypertarget{group___u_a_r_t___exported___types_ggad957348fe227e5cb75b70be026c5ae81ab9335bad77171144c2994f1554ce3901}\label{group___u_a_r_t___exported___types_ggad957348fe227e5cb75b70be026c5ae81ab9335bad77171144c2994f1554ce3901} 
UART\+\_\+\+CLOCKSOURCE\+\_\+\+LSE&LSE clock source \\
\hline

\raisebox{\heightof{T}}[0pt][0pt]{\index{UART\_CLOCKSOURCE\_UNDEFINED@{UART\_CLOCKSOURCE\_UNDEFINED}!UART Exported Types@{UART Exported Types}}\index{UART Exported Types@{UART Exported Types}!UART\_CLOCKSOURCE\_UNDEFINED@{UART\_CLOCKSOURCE\_UNDEFINED}}}\Hypertarget{group___u_a_r_t___exported___types_ggad957348fe227e5cb75b70be026c5ae81a9012cc24ac82c0d7aa7558f73d770eab}\label{group___u_a_r_t___exported___types_ggad957348fe227e5cb75b70be026c5ae81a9012cc24ac82c0d7aa7558f73d770eab} 
UART\+\_\+\+CLOCKSOURCE\+\_\+\+UNDEFINED&Undefined clock source \\
\hline

\end{DoxyEnumFields}
